A NAND flash memory is a well known semiconductor memory device that can store data in a non-volatile manner with high capacity. A cell array of the NAND flash memory is constructed by arranging a NAND cell unit, which includes a plurality of memory cells connected in series.
In the NAND flash memory, parasitic capacitance between word lines increases when memory device features are miniaturized and storage density is increased. Consequently, when a desired voltage is applied to a selected word line, an overshoot of the voltage in the selected word line may occur due to capacitive coupling caused by a change of voltage in an adjacent word line. When the overshoot occurs, a reasonable time delay until the voltage settles down to the desired level is required, causing a reduction in device performance as writing/reading speeds may be decreased. This delay becomes particularly obvious in a NAND flash memory where memory cells are arrayed in three dimensions.